... subexpression^1.1

The term eager does not have a universally agreed-upon definition in the programming languages community. In particular, it is occasionally confused in a semantic scope with the term strict. We use it here in the operational sense as described by [AG94, p.268] and others to mean early concurrent evaluation of the subexpression.

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...[Moh90]^1.2

Eager parallelism is intrinsic in the notion of a future, however; see [RHH85] for details.

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... evaluated^1.3

Not quite. Since it is running in a separate task, the suspended version usually does not have to save and restore as many registers on the stack. This is significant; depending on the amount of data it can be cheaper to allocate a suspension and garbage collect it than to save and restore a lot of registers on the stack.

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...thunks^1.4

A thunk is a closure with no arguments, capturing a form with an environment needed to evaluate the form when the thunk is thawed.

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... languages^2.1

This has also been a factor in the decline of alternative, language-specific architectures.

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... language^2.2

Virtual machines are sometimes called abstract machines in the literature. This term may denote a higher level of abstraction than virtual machine implies.

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... performance^2.3

Strictly speaking, this is true for non-NUMA designs too, but for caching and virtual memory reasons, not network design.

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... dependent^3.1

The current DSI microkernel requires at least four.

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... level^3.2

At least for detection; suspension creation is still an explicit operation at this level.

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... preemption^3.3

Actually, in the current implementation preemption is allowed only on certain instructions, because transient registers are not saved across context switches.

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... scheduling^3.4

See chapter 6 for clarification.

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... mechanism^4.1

Note that we are not talking about a side-effect visible in Daisy.

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... writer^4.2

Due to a locality scheduling constraint that is explained in chapters 5 and 6.

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... ^4.3

See chapter 5.

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... pending^4.4

If possible, signals are delivered to a processor using the actual exception mechanism of the host (if this is too expensive simple polling is used). However, because of DSI's transient register design they can only be delivered in DSI code at certain virtual instruction boundaries. Therefore, they may get delivered in batches; see chapter 3 for further details.

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... register-resident^4.5

In some cases context windows cannot be fully mapped to registers in the host and are partially implemented in memory; this still speeds context switching by avoiding intermediate structure manipulation and suspension swapping.

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... space^5.1

Again, with a different compaction scheme we would need only one vector.

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... created^5.2

Along these lines, our model bears consideration for eager parallel systems (e.g. using futures), which schedule processes as they are created.

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... ^5.3

On the other hand, the snoopy cache architecture used by these systems may be just as sensitive to locality as a NUMA design [DAKM89].

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... language^6.1

Although this could be done with strict arguments, revealed by strictness analysis [Hal87,HW87]; see chapter 8.

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... parallelism^6.2

At least potentially so. See section 5.2.2 and chapter 8.

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... primitives^6.3

The algorithms are loosely based on those used for multisets [FW79,FW80b]; an indeterminate construct appearing in earlier versions of Daisy.

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... process^6.4

This cannot happen under Daisy, but might under a language with side-effects.

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... marked^7.1

Unless a collection occurs while DVISCAN is running, in which case part of the list is marked, and no dangling devices are collected on that occurrence.

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... heap^9.1

Although heap and stack segments are not allocated until a process runs for the first time.

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