Projects for CIS 410/510
(Hardware Specification and Verification)
Neil and Yen: A railway station simulator. Verify that the
traffic light is red when all tracks are full and green otherwise.
Due Friday Dec 5 (or a report before Thursday Dec 11).
Dan Morgan: Simulate a home security system.
Harold and Don: The Star Trek computer. Verify that certain
combinations of actions do not happen, e.g., fire torpedoes while
shields are up. Due Monday Dec 15 at 9:00 AM.
Walid: A simulator for a subset of Verilog (based on Mike
Gordon's paper on the semantic challenge of Verilog). Due Thursday Dec
4 at 10:30.
John FL: Survey of formal methods in hardware description
languages.
Kathie and Ariya: Simulator for a railroad intersection. Verify
some safety and liveness properties. Due Friday Dec 5 at 5 PM or
Friday Dec 12 at 9:00 AM.
Steve: Design and verify a wave-pipelined adder. Due Friday Dec 5
any time.
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times since November 18, 1996.
sabry@cs.uoregon.edu