class: title, smokescreen, shelf, bottom, no-footer background-image: url(images/2019-12-13-12-58-54.png) # 181U Spring 2020 ### Introduction to STM32 --- layout: true .footer[ - Geoffrey Brown, 2020 - 181U ] <style> h1 { border-bottom: 8px solid rgb(32,67,143); border-radius: 2px; width: 90%; } .smokescreen h1 { border-bottom: none; } .small.remark-slide-content.compact {font-size:1.2rem} .smaller.remark-slide-content.compact {font-size:1.1rem} .small-code.remark-slide-content.compact code {font-size:1.0rem} .very-small-code.remark-slide-content.compact code {font-size:0.9rem} .line-numbers{ /* Set "line-numbers-counter" to 0 */ counter-reset: line-numbers-counter; } .line-numbers .remark-code-line::before { /* Increment "line-numbers-counter" by 1 */ counter-increment: line-numbers-counter; content: counter(line-numbers-counter); text-align: right; width: 20px; border-right: 1px solid #aaa; display: inline-block; margin-right: 10px; padding: 0 5px; } </style> --- class: compact # Agenda  * What's a microcontroller ? * ARM Embedded Processors * STM32L4 Processor * Nucleo board Intel i9 Coffee Lake   --- class: compact # Microcontroller  * Self-contained processor on a chip * Desktop processors require an army of other parts * Extremely low cost -- pennies to a few dollars * 8-bit,16-bit, 32-bit are typical sizes * Most common 8-bit -- 8051 (designed in 1980), used in mice, keyboards, etc. * Most common 32-bit -- ARM Cortex-M[0-4] * Typically have common I/O devices built-in --- class: compact # STM32 Family  * STM32F0x -- Cortex-M0 based, very low power, up to 40Mhz * F1, L1, F2 -- Cortex-M3 based (L1 is low power, up to 72Mhz * F3 -- Cortex-M4 based, 72 Mhz, floating point unit * F4 - Cortex-M4 based 250MHz, floating point unit * L4 -- Cortex-M4 based, extremely low power, 80Mhz   --- class: compact, col-2 # Bit Tag * Weight (without harness) 0.64g * Dimensions 22x9x6mm * Runtime (depends on mode, limited by battery to 5000 hours) * Bit/sec storage 239 hours * Cnt/minute 2395 hours * Cnt/4 minutes 5000 hours * Battery capacity 5.5mAh * Average current 1uA * CPU STM32L432KC * Accelerometer ADXL362 * Clock +/-3ppm *   --- class: compact, col-2 # Cortex-M4 * There are many many Cortex-M4 based processors from many silicon providers including * Analog Devices * Cypress * Infineon * Maxim * Microchip * NXP * Silicon Labs * STM * Texas Instruments * ... * The core functionality is defined by ARM * CPU and Instruction Set * Debug hardware * Interrupt controller * The Compiler and binary tool chain is the same across manufacturers * **The I/O devices are manufacturer specific** --- class: compact # STM32L432  * Core Processor is Cortex-M4 * Huge number of communication interfaces * USB * Serial Audio * 2x I2C * 3x USARTs * ... * ADC (analog to digital converter) * 2x DAC (digital to analog converter) * Extreme low power mode * --- class: compact # Microcontroller I/O (input/output)  Key Hardware Concepts are * Memory-mapped I/O * Interrupts * DMA Key Hardware Components are * Timers * A/D and D/A converters * Communication Interfaces * Serial ports * I2C busses * SPI busses --- class: compact # Reality is a bit more complicated    --- class: compact # C Memory Model (Simplified)   --- class: compact # Programming Model   --- class: small-code,compact,hljs-tomorrow-night-eighties,line-numbers # C/Assembly Example ```C int counter; int counterInc(void) { return counter++; } ``` ```Assembly counterInc : 0 024B ldr r3, .L2 @ r3 = &counter 2 1868 ldr r0, [r3] @ r0=*((int*)r3) 4 421C adds r2, r0, 1 @ r2=r0+1 6 1A60 str r2, [r3] @ *((int *) r3) = r2 8 7047 bx lr @ return , value in r0 a C046 . align 2 @ choose next 4 byte address .L2: c 00000000 .word counter @ &counter will be stored here ``` --- class: compact # Memory Mapped I/O   --- class: small-code,compact,hljs-tomorrow-night-eighties,line-numbers # Memory Access Instructions At the machine instruction level, this interface is completely hidden. The Cortex-M0 (and most processors) has only two basic memory access instructions. Load, which reads from “memory” address (pointer) ```C ldr r1, [r2] % r1 = *r2 ``` and Store, which writes to a “memory” address: ```C str r1, [r2] % *r2 = r1 ``` --- class: compact # Cortex Memory Map   --- class: compact # STM32L432 Memory Map   --- class: compact # Serial Communications Topology   --- class: compact # Serial Communications Protocol   --- class: compact # UART Device Model   --- class: compact # STM32L432 Peripheral Memory Map  --- class: small-code,compact,hljs-tomorrow-night-eighties,line-numbers # UART Interface ```C typedef struct { ... configuration registers, etc. __IO uint32_t ISR; /* USART Interrupt and Status Register */ ... __IO uint16_t RDR; /* USART Receive Data Register */ ... __IO uint16_t TDR; /* USART Transmit Data Register */ ... } USART_TypeDef; ``` --- class: small-code,compact,hljs-tomorrow-night-eighties,line-numbers # UART Access Routines ```C void USART_SendData(USART_TypeDef* USARTx, uint16_t Data){ while (!(USARTx->ISR & USART_FLAG_TXE)); USARTx->TDR = (Data & (uint16_t)0x01FF); } ``` ```C uint16_t USART_ReceiveData(USART_TypeDef* USARTx){ while (!(USARTx->ISR & USART_FLAG_RXNE)); return (uint16_t)(USARTx->RDR & (uint16_t)0x01FF); } ``` --- class: compact # ARM Toolchain )  --- class: compact # ARM Binutils * Binutils are processor specific programs used to build and manipulate binary programs * Binary Program Creation * as : assembler * ld : linker * objcopy : Format change * Analysis/Debug * objdump : disassembler * nm : list symbols * gdb : debugger * Other * size : report section sizes * strings : report all strings in binary --- class: compact # Nucleo Development Boards    --- class: compact # Summary * Microcontrollers * stm32l432 * cortex-m4 * programming model * memory-mapped I/O * serial port example * ARM toolchain * Nucleo board